English translation for "technology mapping"

制程对应

Related Translations:

mapping:  n.【数学】映像，映射。

mapes:  梅普斯

maping:  马坪

maped:  马培德

mapped:  绘制...之地图

maps:  madras核能发电厂参数栏地图集地图检索地图搜索地图折三维贴图贴图类型贴图区帖图区微管相关蛋白质休眠所有贴图游戏地图

map:  MAP ＝Military Aid Program 〔美国〕军事援助计划。n.1.地图；天体图；图。2.〔美俚〕脸，面孔。3.〔美俚〕(染色体上基因排列的)遗传图。短语和例子off the map 〔口语〕不重要的；消失的；过时的；陈腐的。 on the map 〔口语〕存在的；重要的；有名的，占显著地位的，起主要作用的。 put oneself on the map 发生

technology technology:  技术力量

technology:  n.1.技术，工程，工艺。2.制造学，工艺学。3.术语(汇编)。短语和例子science and technology 科学和技术。 the technology of sugar 制糖法。

technologies:  备选生产技术

Example Sentences:

	1.	Demonstration of patent technology maps ' facture 专利技术图制作方法实证分析
	2.	Algorithms in lut - based fpga technology mapping are introducted in detail 主要内容为: 1 .详细介绍了工艺映射算法及其技术。
	3.	And algorithms of lut - based fpga technology mapping are playing import roles in designing of eda development environment 基于lut结构的fpga的工艺映射算法在eda开发环境的设计中占有很重要的位置。
	4.	With the addition of core xml technology mappings , the path to supporting oagis within all manner of generic xml tools is now made rather clear . oagis 8 . 0 is a free download 几乎供应商使用的每一项技术都使客户依赖于客户系统不同特征之间的紧耦合，这使得使用松耦合处于很不公平得地位。
	5.	In this thesis , the algorithns of lut - based fpga technology mapping have been introcucted . then novel materials and process are explored and investigated for non - reducible dielectrics . the main results are as follows : 1 本论文正是针对上述的问题,以基于lut结构的fpga的工艺映射算法为研究对象,全面介绍了逻辑分解、深度优化算法、面积优化算法等,对诸多方面作了创新性和探索性研究。
	6.	Abstract : constant components and output opened ports in the result of high - level synthesis lead to explicit redundancy in gate - level technology mapping . explicit redundancy can not improve the performance , but increases power consumption , enlarges circuit area and decreases its testability , so it should be removed . this paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability 文摘:高级综合结果中常量元件和输出悬空端口导致门级工艺映射结果中存在显式冗余.显式冗余无助于提高电路性能，反而增加功耗，降低电路的可测试性，使电路面积增大，应予消除.文中提出了显式冗余的队列循环优化算法，完全消除了此类冗余，从而有效地减少了生成电路的基片面积，提高了电路的可测试性

Similar Words：

"technology license fee" English translation, "technology licensing" English translation, "technology life cycle" English translation, "technology management" English translation, "technology manager" English translation, "technology market" English translation, "technology market management" English translation, "technology market place" English translation, "technology matrix" English translation, "technology maturity" English translation